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From 51cc64f7905fe1d5c541f49ca5a62a30f60e6635 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Wed, 23 Sep 2026 14:33:27 +0100
Subject: [PATCH] JavaScriptCore: map offlineasm ft0..ft7 to the RISCV64 FP
args
The LLInt convention assumes ft0..ft7 are also the platform's
floating-point argument registers, which holds on X86 and ARM64 where the
temp and argument FPRs coincide. The RISC-V ABI separates them: ft0..ft7
are f0..f7 and are temps, while the argument registers are fa0..fa7,
f10..f17.
Map offlineasm's ft0..ft7 onto f10..f17 so the LLInt wfa* aliases, which
chain wfa0 to fa0 to ft0, resolve to the wasm argument FPRs. Physical
f0..f7 become unreachable from offlineasm; JSC's C++ FPRInfo still uses
them as fpRegT8..fpRegT15, and the JIT and offlineasm do not share
register state across call boundaries.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
Source/JavaScriptCore/offlineasm/riscv64.rb | 26 ++++++++++++++-------
1 file changed, 18 insertions(+), 8 deletions(-)
--- a/Source/JavaScriptCore/offlineasm/riscv64.rb
+++ b/Source/JavaScriptCore/offlineasm/riscv64.rb
@@ -217,22 +217,32 @@ end
class FPRegisterID
def riscv64Operand
case @name
+ # The LLInt convention assumes that ft0..ft7 are the platform's
+ # FP argument registers (used as scratches between calls). On X86
+ # and ARM64 the FP temp and FP arg registers happen to coincide
+ # (xmm0-7 / q0-7). RISC-V's ABI splits them: ft0..ft7 = f0..f7 are
+ # temps, fa0..fa7 = f10..f17 are args. To keep LLInt's wfa* aliases
+ # (which chain wfa0 -> fa0 -> ft0) resolving to the wasm arg FPRs,
+ # we map offlineasm's ft0..ft7 directly to physical f10..f17 here.
+ # Physical f0..f7 become unreachable from offlineasm, but JSC's
+ # C++-side FPRInfo still uses them as fpRegT8..fpRegT15 (the JIT
+ # and offlineasm don't share register state across call boundaries).
when 'ft0'
- 'f0'
+ 'f10'
when 'ft1'
- 'f1'
+ 'f11'
when 'ft2'
- 'f2'
+ 'f12'
when 'ft3'
- 'f3'
+ 'f13'
when 'ft4'
- 'f4'
+ 'f14'
when 'ft5'
- 'f5'
+ 'f15'
when 'ft6'
- 'f6'
+ 'f16'
when 'ft7'
- 'f7'
+ 'f17'
when 'csfr0'
'f8'
when 'csfr1'
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